Communication by 31 bit Hamming Code Transceiver with Even Parity and Odd Parity Check Method by Using VHDL
Keywords:
Hamming code, even parity check method, odd parity check method, redundancy bit, transceiver, transmitter, receiver, VHDL, Xilnx ISE 10.1 simulatorAbstract
In communication system communication is possible in three modes. They are simplex, half duplex and full duplex mode. Here, we are working on full duplex mode by using the property of transceiver. Transceiver can transmits and receives data simultaneously.
Here we generate 31 bit code to transmit 25 bit information data. And also find 25 bit actual information data from 31 bit received code.
To generate 31 bit data string form 25 bit actual information data for transmission at transmitting end we use Hamming code method. Here we also use Hamming code methodology for finding 25 bit actual information data from received 31 bit data string at receiving end.
To transmit 25 bit actual information data by using Hamming code even parity and odd parity check method we have to add 5 redundancy bits and 1 bit for deciding the type of parity used (even parity and odd parity ) in actual data string . After adding these 6 bits in 25 bit information data we get 31 bit data string for transmission at transmitting end.
At receiver section, we find 25 bit actual information data string from 31 bit received data string. To find 25 bit information data from 31 bit received data sting we need 5 bit for finding error bit location (if any single bit or double bit error is occurred) and 1 bit is needed for selecting the same parity check method, which we have used at transmitting end.
Here we have written VHDL code for generating 31 bit data string code form 25 bit information data by Hamming code even parity and odd parity check methodology for transmission at transmitting end. Here we also written VHDL code at receiving end for finding
25 bit actual information data from received 31 bit data string code by Hamming code even parity and odd parity check method.
Here we have used Xilinx ISE 10.1 simulator to simulate this VHDL code. Xilinx simulator is a tool which is used for simulation of VHDL, Verilog HDL and schematic circuits.
In this paper we have described, what is communication and their respective mode in detail, in communication section.
In this paper we have also described, what is Hamming code and how it can generate 31 bit data for transmission by 25 bit information data at transmitting end, and how it can find 25 bit actual information from 31 bit received data string at receiving end.
In this paper, we have also described what transceiver is and how it works for communication at transmitting and receiving end.
Till now, from transmitting end we can only transmit data, not receive. And at receiving end we can only receive data but can’t transmit.
Now, we can transmit as well as receive data at both ends (transmitting and receiving end) by using transceiver at both ends.
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